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Physics projects at LHC

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The electronic department has important responsibilities in the LHC experiments and in R&D for detectors.


ATLAS : liquid argon calorimeter (LAr)

The LAPP is involved for a long time in developments for the ATLAS electromagnetic calorimeter. The department developed in the past the ROD boards that allow nowadays to process the LAr calorimeter data. The department also developed a digital ASIC for the calibration boards. For the ATLAS PhaseI upgrade (2019), the department develops a new level-one trigger architecture. This system will allow to process and manage the very huge front-end data flow, about 25Tb/s. A first ATCA prototype, the ABBA board, validated the new architecture. The team designed the AMC LATOME board, dedicated to ATCA crates chosen by the collaboration. In 2018, 150 boards will be installed in the 30 ATCA crates of the calorimeter. The LAPP coordinates the integration of the firmwares that are developed by the collaboration for these boards ( 10 institutes). The team also developed an IPMC mezzanine board that allows the ATCA carrier board management. This board has been largely distributed to the different LHC experiments and the production represents 240 pieces.

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carte latome

ATLAS : IBL services and interlock The department contributes to the developments for the operation security of the ATLAS experiment : the department develops beam interlock systems. Thanks to the very good results at the LHC restart, the agents have designed and installed the IBL interlock system. in collaboration with the mechanics department, the electronics department designed and installed the IBL services : cables, cooling...

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services IBL

ATLAS : services for the tracker prototype

The LAPP ATLAS team proposes an innovative architecture for the future phaseII tracker (2023). For this inclined architecture, it is mandatory to study the powering of the pixels modules and their data transmissions. The department develops flex prototypes that allow to interconnect the modules and the acquisition system, outside of the detector. For this development we meet strong constraints : flex lenght ( 130cm), hight data rate (5Gb/s), matter amout limtation for interaction, hight number of channels, interconections... Prototypes have been produced in 2015 and 2016 and we obtain good results. An important R&D work has been done on future services, on pixels modules, on irradiation tests. Afull solution should allow to prove the reliability of the system before 2018.

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circuits flex et échelle alpine


The department is responsible of the coordination of the FPGA firmwares that are developed by the 15 institutes for the future PCIe acquisition boards. These boards will allow the acquisition of all the systems of the detector for the phaseI upgrade (2019) The department is responsible of the collaboration common working environment for the simulation and intregration of these firmwares. The department develops the common part of the central acquisition firmware and the firmware dedicated to the calorimeter data acquisition.